Multiplying the Power of Light – Graphene One of the Greatest Discoveries of Our Time
Japan electronic engineers at GNC and AIST research centers have successfully created graphene transistors that are constructed and operated in a way that redefines the past 50 years of transistor development. These graphene transistors can be built using conventional CMOS processes, and could potentially be many times smaller, hundreds of times faster, and consume much less power than its silicon transistors counterpart.
Basic design of the transistor has remained pretty much unchanged since their discovery at Bell Labs in 1947.
Their are two terminals, a source and a drain, and a gate in the middle. When the current is applied to the gate, electricity flows between the source and drain. This design has withstood the most dramatic miniaturization mankind has ever seen. From gate lengths measuring in centimeters, down to a few nanometers, unfortunately, it doesn’t work with graphene gates.
Graphene is the most amazing material on Earth. It is the strongest material to yet have been discovered on earth, and also the most electrically conductive.
Transistors built with in the graphene could potentially be hundreds or even thousands of times faster than their silicon counterparts. They can withstand even further miniaturization to gate lengths of just a few nano meters Problem being, though, is that the gate of a transistor must be made out of a semiconductor — and pure graphene is anything but.
This leads us neatly onto this new, fundamentally different transistor from GNC and AIST.
Instead of one gate, the Japanese transistor has two gates and, to create a transport gap, the graphene between the two gates is irradiated with helium ions to introduce crystal defects. By applying a small current to the two gates, the graphene’s bandgap can be manipulated.
When the polarity (positive/negative) is applied to both gates is the same, the transistor turns on; when the polarities are different, the transistor is turned off.
By applying different polarities to each of the gates, the graphene can be switched between n- and p-types — in other words, the transistor can actually have its behavior altered between nFET and pFET modes at runtime. A conventional transistor, of course, is set it stone.
Beyond new design, the most notable aspect of the Japanese transistor is that it’s compatible with conventional CMOS fabrication techniques. The proof-of-concept graphene transistor built by GNC and AIST is absolutely tiny, with a gate width of just 30nm. Compare this with another graphene transistor that we wrote about last year, which was 100,000nm wide.
That is almost unheard of for graphene research groups to begin at such a tiny scale — but that’s the advantage of using hyper-advanced CMOS techniques, rather than starting from scratch.
The research team moving forward will attempt to create a whole wafer of graphene transistors to see if their process is commercially scalable. They want to improve the quality of the graphene that’s being deposited (it’s currently very low quality).
Also they want to investigate the potential of graphene transistors that can be electrically controlled with computer chips.
With these two-gate graphene transistors, we could be talking about ultra-high-speed, ultra-low-power programmable processors — which would be a rather big development in the realm of computing, and a sizable nail in the coffin of silicon chips…